Bibliographic Metadata
- TitleWideband circuit design techniques for ultra-high data-rate wireless communication in silicon technologies / Neelanjan Sarmah from Assam, India
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- EditionElektronische Ressource
- Description1 Online-Ressource (xxii, 139 Blätter)
- Institutional NoteBergische Universität Wuppertal, Dissertation, 2016
- LanguageEnglish
- Document typeDissertation (PhD)
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English
The transition towards sub-mmWave frequencies offer tremendous potential due to the abundantly available RF bandwidth, reduced form-factor of the passives like on-chip antennas, and better lateral and range resolution (as a consequence of high bandwidth). At frequencies below 100 GHz, the limited bandwidth puts an upper limit on the maximum data-rate for communication systems, and it also limits the range resolution for FMCW RADAR systems. Hence, operation towards sub-mmWave frequencies provides an alternative in mitigating the limitations of the existing wireless systems at low frequencies. It also opens the possibility for new applications like high-resolution imaging for security and non-destructive testing, and material identification and characterization. The traditional optical techniques for signal generation and detection at sub-mmWave frequencies are bulky and expensive. The low integration density of III-V based electronic systems limits its scalability, especially for mass volume applications. The recent advancements in silicon process technologies have made it a viable low-cost alternative as compared to III-V based compound semiconductors. A significant advantage of silicon technologies is the high integration density. This allows the implementation of the digital and baseband electronics in the same chip resulting in a compact, and single-chip solution. This gives silicon-based systems a significant edge over the III-V semiconductors in terms of economies of scale. This thesis addresses the various circuit design challenges and system level considerations for the realization of a fully-integrated Tx and Rx chipset towards sub-mmWave frequencies in SiGe BiCMOS technologies. The first part of the thesis is focused on the challenges at the individual circuit building blocks of the RF front-end. The challenges associated with the implementation of wideband amplifiers with high gain and output power at frequencies close to fmax/2 are addressed here. The limited output power of power amplifiers (PAs) limits the maximum range of wireless links, and is one of the significant impediments. In this thesis, the special considerations for loadline matching of PAs towards sub-mmWave frequencies are presented, and power combination techniques for PAs are explored for high power generation. Another key challenge addressed here is the implementation of a high-power wideband tunable local oscillator (LO) source operating at the fundamental frequency with low dc-power consumption. This is one of the key aspects in giving the chipset a generic attribute, which makes it suited for applications requiring a fixed (communication) or a wideband tunable LO (FMCW RADAR, imaging, material characterization). In terms of output power, bandwidth and figure-of-merit (FoM) at the individual building-block level, the results presented in this thesis are beyond the current state-of-the-art in silicon technologies and are comparable to implementations in III-V technologies. Based on the circuit building-blocks presented in the first part, a generic wideband fully integrated direct-conversion 240 GHz quadrature Tx and Rx chipset is implemented and presented in the second part of the thesis. The focus here is on the integration of wideband on-chip antennas designed to be used with an external replaceable silicon lens for high directivity. The chip-lens assembly is mounted on a low-cost PCB material (Rogers 4350B) for an overall compact form-factor. The on-chip antenna and chip-lens assembly is done in a collaborative teamwork and leverages the expertise of our research group in low-cost packaging. For wideband IF matching, stepped impedance microstrip-line based low-pass filters are implemented on the PCB. The packaged chipset was used to demonstrate a high data-rate communication system at 240 GHz over a wireless link of 70 cm. For QPSK and BPSK modulation schemes, the maximum measured data-rates using this chipset are 24 Gbps and 25 Gbps respectively. At the time of writing this thesis, this is the highest data-rate reported in the literature for fully integrated wireless systems above 200 GHz in silicon technologies. A different version of this chipset is used for the demonstration of a monostatic FMCW RADAR system operating in the 210-270 GHz frequency range, and it uses identical circuit building blocks. This proves the generic attribute of this implementation. Hence, the results from this work provide a holistic foundation towards mitigating the challenges at the circuit and system level for the realization of compact, low-cost and fully integrated silicon-based systems for emerging applications towards sub-mmWave frequencies.
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