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Studies on the optical readout of the ATLAS insertable b-layer : from firmware development to commissioning of the back-of-crate card / vorgelegt von Marius Wensing. Wuppertal, August 2015
Content
Introduction
Basics of experimental particle physics
Units
The Standard Model of particle physics
Fermions
Interactions between elementary particles
Higgs boson
Beyond the Standard Model
Experimental particle physics
The Large Hadron Collider and the ATLAS Detector
The Large Hadron Collider
The ATLAS Detector
Overview
Subdetectors
Coordinate system
Trigger and Data Acquisition system
The ATLAS Pixel Detector and its new fourth layer
The Pixel Detector during Run-1
The Insertable b-Layer
The IBL Detector Control System
Overview of the IBL readout system
On-detector readout components
Pixel sensors and the FE-I4
Optoboard
Off-detector readout components
Timing-Trigger-Control Interface Module
Back-of-Crate card
Readout-Driver
Readout-Subsystem
Timing of the ATLAS Pixel Detector
Testing and commissioning steps
Outlook on the Layer-1 and Layer-2 readout upgrade
Requirements for the ATLAS IBL BOC card
Mechanical requirements
Detector interfaces
TTC path to the detector
Data path from the detector
ROS interface
Clock distribution
External Interfaces
Setup-Bus
Ethernet
CAN
Summary of the requirements
Hardware of the ATLAS IBL BOC card
PCB design
FPGAs and direct periphery
Clock circuit
First version
Production version
Optical plugins
DCS monitoring
Firmware development for the ATLAS IBL BOC card
Introduction & Overview
Design flows
Simulation
Synthesis
BCF firmware
Global system interconnect and register bank
BMF firmware loading
Clock monitoring and control
Microblaze processor and its software
BMF firmware
Clock generation
Register bank
BMF transmitter firmware
Overview
Coarse delay (step I)
BPM encoding
Coarse delay (step II)
Serialiser
Fine delay
Debugging and monitoring tools
Simulation results of the transmitter firmware
BMF receiver firmware
Overview
Clock and data recovery
Channel multiplexer
Decoding
ROD data bus
Data Monitoring
FE-I4 emulator firmware
BMF S-LINK firmware
IBL BOC software library
Production of the IBL BOC card
IBL BOC production
Overview of the production test
Production test setup
Production test steps and their results
Optical & electrical inspection
Firmware loading & Network configuration
Clock test
Loopback tests
Optical parameters
Backplane & S-LINK
Production test database
Failures detected during the production test
BCF memory problems
Ethernet problems
Summary of the production test
The IBL BOC card in the system test
Introduction
The Lab infrastructure
Overview
Front-end chips
Optoboard & adapter PCB
ROD/BOC readout hardware
ROS PCs
Software Infrastructure
Scanning in the local infrastructure
System test at CERN
Overview of the SR1 and Pit setup
FE-I4 corruption issue
S-LINK issue
IBL detector timing
Summary of the system test
Future readout concepts
LHC and ATLAS upgrade plans
The ATLAS ITk project
Future readout architectures
GBT and Versatile Link
Overview
GBT studies in Wuppertal
The FELIX readout concept
Overview
Concepts for ITk readout and calibration
PCIe studies
Summary and Outlook
List of Tables
List of Figures
List of Abbreviations
Bibliography