Performance of the insertable b-layer for the ATLAS pixel detector during quality assurance and a novel pixel detector readout concept based on PCIe / vorgelegt von Timon Heim. Wuppertal, July 2, 2015
Content
- Introduction
- Particle Physics
- The ATLAS Experiment
- ATLAS Detector
- The ATLAS Detector Performance during Run 1 and Long Shutdown 1
- Towards the High Luminosity LHC
- The Insertable B-Layer
- Overview
- Motivation
- Sensor Technologies
- Front-End Technology
- The IBL Readout System
- Powering and Detector Control System
- Construction and Integration
- The IBL Stave Testing and Performance
- Timeline
- Stave Test Stand
- Stave Test Procedure
- Database and Analysis Framework
- Stave Performance
- Other Measurements and Lessons Learned
- ToT Calibration
- Comparison of Pixel Defects during Module and Stave QA
- Increased Noise on 3D FBK Modules
- Double Chip Module with one dead Chip
- Conclusion and Thoughts for Future Pixel Detectors
- Development of a Novel Readout System for Pixel Detectors
- Conclusion
- Appendix
- List of Tables
- List of Figures
- Bibliography