Inhalt

•  
   Table of contents
•  
   Introduction
•  
  The LHC and its Upgrade
•  
   The Large Hadron Collider
•  
   The High Luminosity Upgrade
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  The ATLAS Experiment
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   The ATLAS Structure
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   The Inner Tracker Detector
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   Serial Powering for the ITk Pixel Detector
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  Detector Control System for the ITk Pixel Detector
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  Scope of the Detector Control System
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   DCS Architecture
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   The New Pixel DCS
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   Safety Path
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   Control and Feedback Path
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   Diagnostic Path
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   The Existing Monitoring Chip and its Limitation
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   The new Monitoring Of Pixel System (MOPS)
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   Integration of the MOPS Chip (MOPS-Hub)
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  Hardware Requirements and Description of MOPS-Hub
•  
   ITK Pixel Services and Patch Panels
•  
  PP3 Requirements
•  
   Power Requirements
•  
   Cable Resistances
•  
   ITk Grounding and Shielding
•  
   Radiation Background
•  
   Magnetic Field
•  
   Communication Interfaces
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   Controller Area Network (CAN)
•  
   eLinks
•  
   PP3-Power Module
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  CAN Interface Card
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   CAN Interface
•  
   CAN Bus Control
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   CAN bus Monitoring
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   PP3-FPGA Module
•  
   EMCI/EMP Chain
•  
  Radiation Effects on Semiconductor Devices
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  Particle Interactions with Matter
•  
   Heavy Charged Particles
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   Electrons
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   Photons
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  Radiation Effects on Semiconductors
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   Accumulated effects
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   Single Event Effects (SEE)
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  SEE Characterisation
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   Direct Ionization
•  
   Indirect Ionization
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   Radiation level in the ATLAS Hall
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  FPGAs and its Radiation Tolerance
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   FPGA Architecture and Technologies
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   Development Workflow
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   Firmware Simulation
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   Synthesis and Implementation
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   SRAM-based FPGA Technology
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  Radiation Effects on SRAM-based FPGAs
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   TID Effect in SRAM
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   SEE in SRAM
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   Radiation Hardness Studies of SRAM-FPGA
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   SEU Mitigation in SRAM-FPGAs
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   Triple Modular Redundancy (TMR)
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   Configuration Scrubbing
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  SEU Protection for 7-Series FPGAs
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   7-Series Frame Layout
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   Readback CRC
•  
   Soft Error Mitigation IP (SEM IP)
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  Firmware Description and Verification
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  Firmware Architecture
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   Firmware Components
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   Clock Distribution
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  Development Workflow
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   Firmware Design and Simulation
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   Synthesis and Implementation
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   Design Verification
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   The CAN Interface
•  
   Overview
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   CANakari CAN-Controller
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   CAN State Machine
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   Data Frame Structure
•  
  SPI Interfaces
•  
   Overview
•  
   The Monitoring Interface
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   The Bus Control Interface
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  The eLink Interface
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   The eLink Transmitter
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   The eLink Receiver
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   The eLink Serializer
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   eLink State Machines
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   Data Frame Structure
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   Simulation
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   Central Finite State Machine
•  
   Overview
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   Initialization Phase
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   Operational Phase
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   Watchdog Phase
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  Watchdog Timer
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   Watchdog Timer Mechanism
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   Simulation
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  UART Debugger
•  
   Overview
•  
   Debugging Mechanism
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   Simulation
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  SEU Mitigation in MOPS-Hub
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   Strategy 1: State Machine and Logic
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   Strategy 2 : Fabric Logic Elements Protection
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   Strategy 3: CRAM Protection
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  Test Results and Validation
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   The MOPS-Hub Readout Board
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   Firmware Architecture
•  
   Clock Distribution
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   eLink Components
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   Ethernet MAC
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   IPBus Interface
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   Software Implementation
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  PP3-Power Module Testing
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   DC/DC Measurements
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   Startup Behavior Study
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   Magnetic Field Test
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  CAN Interface Card Testing
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   DC/DC Measurements
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   Voltages Level of the Communication Channels
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   Cross Talk Check
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   Noise Measurements
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   Magnetic Field Test
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  Full System Testing
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   Test Setup
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   Test Procedure and Results
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   Power Consumption of the MOPS-Hub Crate
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  Irradiation Tests of the MOPS-Hub
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  TID Tests
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   PP3-Power Module
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   CAN Interface Card
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   PP3-FPGA Module
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   Neutron Campaign
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   PP3-Power Module
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   CAN Interface Card
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   PP3-FPGA Module
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  Proton Campaign
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   HIT Facility
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   Test Procedure: Setup and Description
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   Summary of the Proton Campaign Results
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  Conclusion
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   Status and Summary
•  
   Outlook
•  
   Acknowledgments
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   Bibliography
•  
   Acronyms
•  
   List of Figures
•  
   List of Tables
•  
   Requirements in the ATLAS Hall
•  
   Radiation level in the ATLAS Hall
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   Magnetic Field in the ATLAS Hall
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  Hardware
•  
  PP3-Power Module Testing
•  
   DC/DC Measurements
•  
   Magnetic Field Test
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  CIC Testing
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   DC/DC Measurements
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   Powering Measurements for Communication Channels
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   Noise measurements
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   Cross Talk Check
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   Magnetic Field Test
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   TID Irradiation Test
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   Neutron Irradiation Test
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  PP3 FPGA Testing
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   Neutron Irradiation Test
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   Full Crate Setup
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  Firmware
•  
  Internal Signals in PP3-FPGA
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   CANakari Signals
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   CAN FSM Signals
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   SPI FSM Signals
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   eLink FSM Signals
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  CRAM Protection in MOPS-Hub
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   2-bits Upset
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   Multi-bits Upset
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  Internal Signals in MOPS-Hub Readout
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   The Slave-to-Master IPBus Interface