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Development and characterization of the Monitoring of Pixel System (MOPS) chip to monitor the ATLAS ITk Pixel Detector / Rizwan Ahmad. Wuppertal, 20.09.2023
Inhalt
Table of contents
CERN and the Large Hadron Collider
Research at CERN and the LHC
Experiments running at the LHC
LHC high luminosity upgrade
The ATLAS experiment
Overview and sub-detectors of the ATLAS experiment
The ATLAS ITk Pixel Detector
Serial powering scheme for the detector modules
Detector Control System (DCS) for the ATLAS ITk Pixel Detector
Requirements for the new DCS system
Proposed DCS concept of the Pixel Detector
Safety path
Control & feedback path
Diagnostics path
Current monitoring technology and its limitation
Available commercial solutions
Motivation to develop a new monitoring chip
Integrated circuit development and radiation tolerance
Development of Integrated Circuits (ICs)
Analog IC design
Digital IC design
Effect of radiation on Integrated Circuits
Cumulative dose effects
Single-event Effects (SEE)
TID tolerance
SEE mitigation
First test prototype
Purpose and components of the chip
3000 bits shift register for SEU studies
Problems seen on the chip
Outcome and lessons learned
Monitoring of Pixel System (MOPS) chip
Requirements for the chip
Chip versions
MOPS communication protocol
CAN bus communication protocol
CANopen protocol
Digital block
Initialization scheme
Top level state machine
CAN node interface
On-chip CANopen implementation
Object dictionary
ADC Interface
Watchdog timers
Automated Oscillator trimming
Controller Area Network (CAN) protocol unit
Data buffers
Design techniques for a robust MOPS digital logic
Improvements in the digital design and new features in the MOPSv2
Digital logic verification and full-netlist simulation
Analog block
Power-on-Reset generator
On-chip shunt LDO regulator
Bandgap reference generator
On-chip oscillator
Custom low voltage CAN physical layer
Analog to digital converter
Analog block modifications and improvements in the MOPSv2
Required external components and monitoring precision
Measurement setup and test results
Hardware/software parts of the testsetup
Regulator, Bandgap reference and POR measurements
Digital functionality
ADC characterization
Operation with realistic services
Operational temperature and performance
Scope of measurements
Startup performance
MOPSv1
MOPSv2
Temperature cycling between -40 °C to +60 °C during operation
Long term stability / reliability at +60 °C
Summary
Radiation tolerance of the MOPS chip
Irradiation using X-rays
MOPSv1, frequent power cycling
MOPSv2, low dose, high temperature
SEU tolerance using Heavy Ions
MOPSv2 performance
SEU cross section for 3000-bit shift register
Summary
Packaging and production
Packaging experience
Pre-production yield and QA/QC tests
MOPSv3 for production
Conclusion and future work
Acknowledgments
Bibliography
List of Figures
List of Tables
MOPS IO pads description
Power and IO Signal Specifications
MOPS CANopen object dictionary